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[source in ebook] 256点FFT源代码

Description: 256点FFT IP核。包括16bit和8bit两种精度和C、VHDL、Verilog三种语言的多版本、多精度的IP核
Platform: | Size: 352372 | Author: ykletter@163.com | Hits:

[source in ebook] 512点FFT

Description: 512点FFT IP核。包括C、VHDL和Verilog三种语言版本，8bit与16bit两种精度。
Platform: | Size: 410745 | Author: ykletter@163.com | Hits:

[Other] FFT16

Description: 基于FPGA的16点FFT快速傅立叶变换的Verilog源代码。-the FFT implement of Verilog based on FPGA
Platform: | Size: 2048 | Author: lsd | Hits:

[VHDL-FPGA-Verilog] 2C35F672_FFT

Description: 在Altera芯片2C35F672平台上的FFT程序，采用DSPBuilder5.0，生成Verilog文件。开发环境：QuartusII5.0。-In the Altera chip 2C35F672 platform FFT procedures DSPBuilder5.0, generated Verilog file. Development Environment: QuartusII5.0.
Platform: | Size: 474112 | Author: lovenevol | Hits:

[VHDL-FPGA-Verilog] fft_IPcore

Description: 这是一个fft的IP核，安装要求为quartus6.0以上。解压安装后可在quartus里例化使用，元件主要为cyclone和stratix,最大支持1024点的转换。
Platform: | Size: 8719360 | Author: 李杰 | Hits:

[VHDL-FPGA-Verilog] ip_fft128

Description: 128点fft的IP核vhdl源代码，另有其控制代码。-128 point fft s IP core VHDL source code, while its control code.
Platform: | Size: 7168 | Author: 戈立军 | Hits:

[Linux-Unix] Linux_bc

Description: 对vga接口做了详细的介绍，并且有一 ·三段式Verilog的IDE程序，但只有DMA ·电子密码锁，基于fpga实现，密码正 ·IIR、FIR、FFT各模块程序设计例程， ·基于逻辑工具的以太网开发，基于逻 ·自己写的一个测温元件（ds18b20）的 ·光纤通信中的SDH数据帧解析及提取的 ·VHDL Programming by Example（McGr ·这是CAN总线控制器的IP核，源码是由 ·FPGA设计的SDRAM控制器，有仿真代码 ·xilinx fpga 下的IDE控制器原代码, ·用verilog写的，基于查表法实现的LO ·精通verilog HDL语言编- up:in STD_LOGIC down:in STD_LOGIC run_stop:in STD_LOGIC wai_t: in std_logic_vector(2 downto 0) lift:in std_logic_vector(2 downto 0) ladd: out std_logic_vector(1 downto 0) ) end control
Platform: | Size: 18683904 | Author: liuzhou | Hits:

[VHDL-FPGA-Verilog] fft_verilog

Description: FFT IP core 源码 状态控制机-FFT IP core
Platform: | Size: 7168 | Author: chris | Hits:

[VHDL-FPGA-Verilog] FFT_verilog

Description: verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近-verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to
Platform: | Size: 618496 | Author: culun | Hits:

[VHDL-FPGA-Verilog] FPGA_FFT

Description: 基于IP核的FPGA FFT算法模块的设计与实现 在QUATUSII下实现-IP-based core module FPGA FFT algorithm design and implementation be achieved in QUATUSII
Platform: | Size: 222208 | Author: linxing | Hits:

[VHDL-FPGA-Verilog] pipelined_fft_64

Description: 利用IP Core编写的Verilog程序，实现FFT变换，希望对大家有帮助。-Written using Verilog IP Core procedures to achieve FFT transformation, we want to help.
Platform: | Size: 99328 | Author: chengyungang | Hits:

[VHDL-FPGA-Verilog] fft_2011_3_23(COMPLETE-FFT1024)

Description: VERILOG FFT IP核调用，以及其控制文件-VERILOG FFT IP core call, as well as its control file
Platform: | Size: 20978688 | Author: 贾斌 | Hits:

[VHDL-FPGA-Verilog] FFT

Description: verilog 实现FFT IP核的控制，借鉴给需要学习的朋友-verilog achieve FFT IP core control, reference to the need to learn a friend
Platform: | Size: 12124160 | Author: 甘超 | Hits:

[Windows Develop] vFFT_veriloge

Description: verilog实现的FFT变换，经硬件测试其功能与AAltera的FFT IP核相近， -verilog realization of the FFT algorithm, its function is similar to the FFT IP AAltera the nuclear test by the hardware,
Platform: | Size: 619520 | Author: magnet | Hits:

[MPI] fft

Description: altera公司fft ip核的运用。语言是verilog.-Altera company s fft ip. Language verilog.
Platform: | Size: 11977728 | Author: shiyuan | Hits:

[Software Engineering] FFTPVerilog

Description: FFT Verilog RTL 经过测试与Altera FFT IP相当-FFT Verilog RTL Altera FFT IP
Platform: | Size: 8192 | Author: liu | Hits:

[VHDL-FPGA-Verilog] fft_test

Description: ALTERA的FFT IP核时序的仿真，verilog语言。采用burst方式，FFT点数2048点-FFT IP core of timing simulation ALTERA, verilog language. Using burst mode, FFT points 2048 points
Platform: | Size: 25623552 | Author: vincentspace | Hits:

[VHDL-FPGA-Verilog] Altera FFT IP核 使用实例

Description: Verilog，关于如何调用Altera官方的FFT iP核，如何输入和得到输出的实例。
Platform: | Size: 9807 | Author: dumn1234 | Hits:

[VHDL-FPGA-Verilog] FFT

Description: verilog xilinx IP实现FFT仿真-Verilog xilinx IP implementation FFT simulation
Platform: | Size: 2973696 | Author: 欧阳 | Hits:

[Other] FFT v1

Description: IP core fft verilog code example
Platform: | Size: 5766144 | Author: mrv | Hits:
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